AMAZON Prin SOC Architect in San Diego, CA

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Description

The Principal SoC architect is responsible for architecting the 1P SoC and its building blocks based on use case requirements provided by the system architecture team and the definition of the silicon provided by the Device Product Manager (PM).

Key job responsibilities
The SOC architect collaborates with the IP architects, the silicon design team and the silicon PM when deciding on the silicon architecture, to deliver the performance/power requirements (input from the system architect), different IP requirements and constraints (input from the IP architect) and area/cost/schedule (input from the Device PM and silicon design team). The SoC Architect is also the Chip Lead for the SoC working closely with Physical Design team to partition the silicon, design the interconnect based on BW and performance requirements and develop preliminary floor plan, clocking and power management based on estimates. During post silicon phase, the SoC architect is the first line of defense for issues arising from ATE or bugs identified from silicon validation. In depth knowledge of test, debug and manufacturability is a must as the principal SoC Architect will help tackle design marginality issues due to process variations and recommend voltage, temperature tradeoffs to improve yield and ensuring that the recommendations are within design specifications. The role also requires deep understanding not only of the SoC micro-architecture but also of all highspeed interfaces (DDR, USB, HDMI etc.) and is expected to provide guidance to the respective domain owners during development and debug. Key deliverable from the SOC architect is the SoC architecture spec, along with the sub-system architecture specs in collaboration with IP architects and design leads.

A day in the life
The work of a SOC Architect at Lab126 spans the full chip development lifecyclefrom defining specifications for new edge AI-powered multimedia SOCs to reviewing microarchitecture designs and testplans with cross-functional teams. On any given day, you might be crafting architectural specs for an upcoming chip or debugging complex issues with older SOCs during bring-up and validation, requiring seamless collaboration across product, design, verification, and validation teams.

About the team
The SSG Silicon Development team is building 1P Multi-Core Processor SOCs with Machine Learning capability, high speed memories and multimedia functions consisting of several key IPs including Display, ISP, ML engine and Security for Devices & Services Org on advanced processor technology nodes. These custom SOCs have the overarching goal to bring power efficient best-in-class technical advancements at a competitive price point. The current team has over 4 plus years of experience building silicon along with the SW stack to use them.

Basic Qualifications

Master's degree in EE or related field
10 years of experience in SoCs and/or silicon development
2 years of experience in the domain listed above
2 years of experience in RTL design, synthesis and timing closure
2 years of DFx (Design for cost, test, manufacturing)

Preferred Qualifications

PhD in Electronic Engineering or related field
Experience leading an SoC project as a lead architect from conception to launch and has experience in all aspects of SoC design, including front-end architecture development, RTL design and synthesis, RTL modeling and verification, power and performance, and manufacturing and qualification.
Experience designing SoC interconnects for high throughput media blocks
and CPUs
Experience with ARM and x86 ISA
Expertise in at least one of the following areas: video system architecture,
audio DSPs, low power WiFi and BT, graphics and display engines.
Familiarity with silicon manufacturing process, including silicon
qualification
Familiarity with embedded software development and debugging

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Companys reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region youre applying in isnt listed, please contact your Recruiting Partner.

The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at />
USA, CA, San Diego - 189,400.00 - 256,200.00 USD annually
USA, CA, Sunnyvale - 217,800.00 - 294,700.00 USD annually

The Principal So. C architect is responsible for architecting the 1 P So. C and its building blocks based on use case requirements provided by the system architecture team and the definition of the silicon provided by the Device Product Manager (PM). Key job responsibilities. The SOC architect collaborates with the IP architects, the silicon design team and the silicon PM when deciding on the silicon architecture, to deliver the performance/power requirements (input from the system architect), different IP requirements and constraints (input from the IP architect) and area/cost/schedule (input from the Device PM and silicon design team). The So. C Architect is also the Chip Lead for the So. C working closely with Physical Design team to partition the silicon, design the interconnect based on BW and performance requirements and develop preliminary floor plan, clocking and power management based on estimates. During post silicon phase, the So. C architect is the first line of defense for issues arising from ATE or bugs identified from silicon validation. In depth knowledge of test, debug and manufacturability is a must as the principal So. C Architect will help tackle design marginality issues due to process variations and recommend voltage, temperature tradeoffs to improve yield and ensuring that the recommendations are within design specifications. The role also requires deep understanding not only of the So. C micro-architecture but also of all highspeed interfaces (DDR, USB, HDMI etc.) and is expected to provide guidance to the respective domain owners during development and debug. Key deliverable from the SOC architect is the So. C architecture spec, along with the sub-system architecture specs in collaboration with IP architects and design leads. A day in the life. The work of a SOC Architect at Lab 126 spans the full chip development lifecyclefrom defining specifications for new edge AI-powered multimedia SO - Cs to reviewing microarchitecture designs and testplans with cross-functional teams. On any given day, you might be crafting architectural specs for an upcoming chip or debugging complex issues with older SO - Cs during bring-up and validation, requiring seamless collaboration across product, design, verification, and validation teams. About the team. The SSG Silicon Development team is building 1 P Multi-Core Processor SO - Cs with Machine Learning capability, high speed memories and multimedia functions consisting of several key I - Ps including Display, ISP, ML engine and Security for Devices & Services Org on advanced processor technology nodes. These custom SO - Cs have the overarching goal to bring power efficient best-in-class technical advancements at a competitive price point. The current team has over 4 plus years of experience building silicon along with the SW stack to use them. Basic Qualifications. Master's degree in EE or related field 10 years of experience in SoCs and/or silicon development 2 years of experience in the domain listed above 2 years of experience in RTL design, synthesis and timing closure 2 years of D - Fx (Design for cost, test, manufacturing)Preferred Qualifications. PhD in Electronic Engineering or related field. Experience leading an So. C project as a lead architect from conception to launch and has experience in all aspects of So. C design, including front-end architecture development, RTL design and synthesis, RTL modeling and verification, power and performance, and manufacturing and qualification. Experience designing So. C interconnects for high throughput media blocksand CP - Us. Experience with ARM and x 86 ISA - Expertise in at least one of the following areas: video system architecture,audio DSPs, low power WiFi and BT, graphics and display engines. Familiarity with silicon manufacturing process, including siliconqualification. Familiarity with embedded software development and debugging.
search terms: Architect+Processor
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